⚠ Novel chemotype — no close known analogue (best Tanimoto < 0.3). Unexplored chemical space relative to ChEMBL.
Similar compounds — the chemically nearest patent molecules
Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.
| Compound | similarity | top predicted | shared targets | |
|---|---|---|---|---|
| Phosphine SCHEMBL6852575 | 0.87 | — | — | |
| Phosphine SCHEMBL8891940 | 0.87 | — | — | |
| SCHEMBL27635790 | 0.82 | — | — | |
| Phosphine SCHEMBL30293816 | 0.82 | — | — | |
| Phosphine SCHEMBL27852307 | 0.82 | — | — | |
| SCHEMBL28091446 | 0.82 | — | — | |
| Phosphine SCHEMBL755303 | 0.82 | — | — | |
| SCHEMBL30721170 | 0.82 | — | — | |
| Phosphine SCHEMBL542123 | 0.82 | — | — | |
| SCHEMBL31277661 | 0.82 | — | — |
Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.
Patent provenance — the patents this molecule appears in, and who filed them
Claimed or disclosed in 11 patents. claimed = in the patent's claims; disclosed = body only.
| Patent | Title | Assignee | Published | Priority | Filing | Country | Status |
|---|---|---|---|---|---|---|---|
| CN-1433572-A | Novel chip interconnect and packaging deposition methods and structures | NUTOOL INC (US) | 2003-07-30 | — | — | CN | claimed |
| CN-103779269-A | Method for processing copper surface of interconnected wire | SEMICONDUCTOR MFG INT SHANGHAI | 2014-05-07 | — | — | CN | disclosed |
| CN-101924063-B | Integrated circuit system employing low-K dielectrics and method of manufacture thereof | GLOBALFOUNDRIES SG PTE LTD | 2013-10-30 | — | — | CN | disclosed |
| US-8298911-B2 | Methods of forming wiring structures | SAMSUNG ELECTRONICS CO., LTD. (KR) | 2012-10-30 | — | — | US | disclosed |
| US-8232653-B2 | Wiring structures | SAMSUNG ELECTRONICS CO., LTD. (KR) | 2012-07-31 | — | — | US | disclosed |
| US-20120012897-A1 | Vertically Fabricated BEOL Non-Volatile Two-Terminal Cross-Trench Memory Array with Two-Terminal Memory Elements and Method of Fabricating the Same | UNITY SEMICONDUCTOR CORPORATION (US) | 2012-01-19 | — | — | US | disclosed |
| US-20110183516-A1 | METHODS OF FORMING WIRING STRUCTURES | SAMSUNG ELECTRONICS CO., LTD. (KR) | 2011-07-28 | — | — | US | disclosed |
| CN-101924063-A | Use the integrated circuit (IC) system and the manufacture method thereof of low-K dielectric | GLOBALFOUNDRIES SG PTE LTD | 2010-12-22 | — | — | CN | disclosed |
| US-20100244255-A1 | Wiring structures | SAMSUNG ELECTRONICS CO., LTD. (KR) | 2010-09-30 | — | — | US | disclosed |
| CN-1238891-C | Novel chip interconnect and packaging deposition methods and structures | ASM NUTOOL INC (US) | 2006-01-25 | — | — | CN | disclosed |
| CN-1433572-A | Novel chip interconnect and packaging deposition methods and structures | NUTOOL INC (US) | 2003-07-30 | — | — | CN | disclosed |