⚠ Novel chemotype — no close known analogue (best Tanimoto < 0.3). Unexplored chemical space relative to ChEMBL.
Similar compounds — the chemically nearest patent molecules
Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.
| Compound | similarity | top predicted | shared targets | |
|---|---|---|---|---|
| SCHEMBL1934035 | 0.82 | — | — | |
| SCHEMBL29550663 | 0.82 | — | — | |
| SCHEMBL8379010 | 0.82 | — | — | |
| SCHEMBL221228 | 0.82 | — | — | |
| SCHEMBL221229 | 0.82 | — | — | |
| SCHEMBL8379009 | 0.82 | — | — | |
| SCHEMBL277978 | 0.82 | — | — | |
| SCHEMBL1934036 | 0.82 | — | — | |
| SCHEMBL8379017 | 0.82 | — | — | |
| SCHEMBL28289634 | 0.82 | — | — |
Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.
Patent provenance — the patents this molecule appears in, and who filed them
Claimed or disclosed in 12 patents. claimed = in the patent's claims; disclosed = body only.
| Patent | Title | Assignee | Published | Priority | Filing | Country | Status |
|---|---|---|---|---|---|---|---|
| EP-2065927-B1 | Integration and manufacturing method of Cu germanide and Cu silicide as Cu capping layer | IMEC (BE) | 2013-10-02 | — | — | EP | claimed |
| CN-101515563-B | Method for producing a cover layer | TAIWAN SEMICONDUCTOR MFG | 2011-07-27 | — | — | CN | claimed |
| US-7858519-B2 | Integrated circuit and manufacturing method of copper germanide and copper silicide as copper capping layer | IMEC (BE) | 2010-12-28 | — | — | US | claimed |
| CN-101515563-A | Method for manufacturing cover layer and semiconductor device | IMEC INTER UNI MICRO ELECTR (CN) | 2009-08-26 | — | — | CN | claimed |
| EP-2065927-A1 | Integration and manufacturing method of Cu germanide and Cu silicide as Cu capping layer | Interuniversitair Microelektronica Centrum (IMEC) (BE) | 2009-06-03 | — | — | EP | claimed |
| US-20090134521-A1 | INTEGRATED CIRCUIT AND MANUFACTURING METHOD OF COPPER GERMANIDE AND COPPER SILICIDE AS COPPER CAPPING LAYER | INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW (BE) | 2009-05-28 | — | — | US | claimed |
| EP-2065927-B1 | Integration and manufacturing method of Cu germanide and Cu silicide as Cu capping layer | IMEC (BE) | 2013-10-02 | — | — | EP | disclosed |
| CN-101515563-B | Method for producing a cover layer | TAIWAN SEMICONDUCTOR MFG | 2011-07-27 | — | — | CN | disclosed |
| US-7858519-B2 | Integrated circuit and manufacturing method of copper germanide and copper silicide as copper capping layer | IMEC (BE) | 2010-12-28 | — | — | US | disclosed |
| CN-101515563-A | Method for manufacturing cover layer and semiconductor device | IMEC INTER UNI MICRO ELECTR (CN) | 2009-08-26 | — | — | CN | disclosed |
| EP-2065927-A1 | Integration and manufacturing method of Cu germanide and Cu silicide as Cu capping layer | Interuniversitair Microelektronica Centrum (IMEC) (BE) | 2009-06-03 | — | — | EP | disclosed |
| US-20090134521-A1 | INTEGRATED CIRCUIT AND MANUFACTURING METHOD OF COPPER GERMANIDE AND COPPER SILICIDE AS COPPER CAPPING LAYER | INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW (BE) | 2009-05-28 | — | — | US | disclosed |