⚠ Novel chemotype — no close known analogue (best Tanimoto < 0.3). Unexplored chemical space relative to ChEMBL.
Similar compounds — the chemically nearest patent molecules
Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.
| Compound | similarity | top predicted | shared targets | |
|---|---|---|---|---|
| SCHEMBL691853 | 0.82 | — | — | |
| SCHEMBL29893819 | 0.82 | — | — | |
| SCHEMBL1628997 | 0.82 | — | — | |
| SCHEMBL1014168 | 0.82 | — | — | |
| SCHEMBL423719 | 0.82 | — | — | |
| SCHEMBL31435088 | 0.82 | — | — | |
| SCHEMBL969109 | 0.82 | — | — | |
| SCHEMBL1792061 | 0.82 | — | — | |
| SCHEMBL6891027 | 0.82 | — | — | |
| Ammonia Solution, Strong SCHEMBL1287588 | 0.67 | — | — |
Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.
Patent provenance — the patents this molecule appears in, and who filed them
Claimed or disclosed in 70 patents — showing the first 20. claimed = in the patent's claims; disclosed = body only.
| Patent | Title | Assignee | Published | Priority | Filing | Country | Status |
|---|---|---|---|---|---|---|---|
| US-11676938-B2 | Semiconductor device and method of making wafer level chip scale package | JCET SEMICONDUCTOR (SHAOXING) CO., LTD. | 2023-06-13 | — | — | US | disclosed |
| US-10978363-B2 | Semiconductor structure with conductive structure | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (TW) | 2021-04-13 | — | — | US | disclosed |
| US-10978362-B2 | Semiconductor structure with conductive structure | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (TW) | 2021-04-13 | — | — | US | disclosed |
| US-20200091022-A1 | SEMICONDUCTOR STRUCTURE WITH CONDUCTIVE STRUCTURE | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (TW) | 2020-03-19 | — | — | US | disclosed |
| US-20200083125-A1 | SEMICONDUCTOR STRUCTURE WITH CONDUCTIVE STRUCTURE | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (TW) | 2020-03-12 | — | — | US | disclosed |
| US-10553487-B2 | Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation | STATS ChipPAC Pte. Ltd. (SG) | 2020-02-04 | — | — | US | disclosed |
| CN-104253058-B | The method and semiconductor device of Stacket semiconductor small pieces on fan-out-type WLCSP | 新科金朋有限公司 | 2019-08-06 | — | — | CN | disclosed |
| CN-104733379-B | The semiconductor devices and method of the RDL of pitch are formed on a semiconductor die | 新科金朋有限公司 | 2019-03-12 | — | — | CN | disclosed |
| US-10115701-B2 | Semiconductor device and method of forming conductive vias by backside via reveal with CMP | STATS ChipPAC Pte. Ltd. (SG) | 2018-10-30 | — | — | US | disclosed |
| US-20180218953-A1 | SEMICONDUCTOR STRUCTURE WITH CONDUCTIVE STRUCTURE | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. (TW) | 2018-08-02 | — | — | US | disclosed |
| US-20130140691-A1 | Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration | STATS CHIPPAC, LTD. (SG) | 2013-06-06 | — | — | US | disclosed |
| US-20130134580-A1 | Semiconductor Device and Method of Forming RDL Under Bump for Electrical Connection to Enclosed Bump | STATS CHIPPAC, LTD. (SG) | 2013-05-30 | — | — | US | disclosed |
| US-20130105967-A1 | Semiconductor Die and Method of Forming Sloped Surface in Photoresist Layer to Enhance Flow of Underfill Material Between Semiconductor Die and Substrate | STATS CHIPPAC, LTD. (SG) | 2013-05-02 | — | — | US | disclosed |
| US-20130093100-A1 | Semiconductor Device and Method of Forming Conductive Pillar Having an Expanded Base | STATS CHIPPAC, LTD. (SG) | 2013-04-18 | — | — | US | disclosed |
| CN-103050476-A | Semiconductor device and method of forming protection and support structure for conductive interconnect structure | STATS CHIPPAC LTD | 2013-04-17 | — | — | CN | disclosed |
| CN-103050436-A | Semiconductor device and method of forming conductive pillar having an expanded base | STATS CHIPPAC LTD | 2013-04-17 | — | — | CN | disclosed |
| US-20130069227-A1 | Semiconductor Device and Method of Forming Protection and Support Structure for Conductive Interconnect Structure | STATS CHIPPAC, LTD. (SG) | 2013-03-21 | — | — | US | disclosed |
| US-20130069225-A1 | Semiconductor Device and Method of Forming Protection and Support Structure for Conductive Interconnect Structure | STATS CHIPPAC, LTD. (SG) | 2013-03-21 | — | — | US | disclosed |
| CN-102623391-A | Semiconductor device and method of forming integrated passive device over semiconductor die with conductive bridge and fan-out redistribution layer | STATS CHIPPAC LTD | 2012-08-01 | — | — | CN | disclosed |
| US-20120161279-A1 | Semiconductor Device and Method of Forming Integrated Passive Device Over Semiconductor Die with Conductive Bridge and Fan-Out Redistribution Layer | STATS CHIPPAC, LTD. (SG) | 2012-06-28 | — | — | US | disclosed |