⚠ Novel chemotype — no close known analogue (best Tanimoto < 0.3). Unexplored chemical space relative to ChEMBL.
Similar compounds — the chemically nearest patent molecules
Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.
| Compound | similarity | top predicted | shared targets | |
|---|---|---|---|---|
| SCHEMBL33330 | 0.82 | — | — | |
| SCHEMBL2199064 | 0.82 | — | — | |
| SCHEMBL19056860 | 0.67 | — | — | |
| SCHEMBL4326574 | 0.67 | — | — | |
| SCHEMBL5996231 | 0.67 | — | — | |
| SCHEMBL8368424 | 0.67 | — | — | |
| SCHEMBL2816915 | 0.67 | — | — | |
| SCHEMBL17766196 | 0.67 | — | — | |
| SCHEMBL721061 | 0.67 | — | — | |
| SCHEMBL19056853 | 0.67 | — | — |
Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.
Patent provenance — the patents this molecule appears in, and who filed them
Claimed or disclosed in 516 patents — showing the first 20. claimed = in the patent's claims; disclosed = body only.
| Patent | Title | Assignee | Published | Priority | Filing | Country | Status |
|---|---|---|---|---|---|---|---|
| CN-114411117-B | Method for preparing diamond film with micro-texture surface on stainless steel | 浙江工业大学 | 2024-05-03 | — | — | CN | claimed |
| CN-111293164-B | Semiconductor device with a plurality of semiconductor chips | 南亚科技股份有限公司 | 2023-03-14 | — | — | CN | claimed |
| CN-114411117-A | Method for preparing surface microtextured diamond film on stainless steel | 浙江工业大学 | 2022-04-29 | — | — | CN | claimed |
| US-10937886-B2 | Semiconductor device with negative capacitance material in buried channel | NANYA TECHNOLOGY CORPORATION (TW) | 2021-03-02 | — | — | US | claimed |
| CN-111293164-A | Semiconductor device with a plurality of semiconductor chips | 南亚科技股份有限公司 | 2020-06-16 | — | — | CN | claimed |
| US-20200185507-A1 | SEMICONDUCTOR DEVICE WITH NEGATIVE CAPACITANCE MATERIAL IN BURIED CHANNEL | NANYA TECHNOLOGY CORPORATION (TW) | 2020-06-11 | — | — | US | claimed |
| CN-103125013-B | System and method for selective deposition of tungsten in a via | NOVELLUS SYSTEMS, INC. (US) | 2015-09-30 | — | — | CN | claimed |
| CN-103125013-A | System and method for selective deposition of tungsten in a via | NOVELLUS SYSTEMS INC | 2013-05-29 | — | — | CN | claimed |
| US-20100213541-A1 | SEMICONDUCTOR DEVICE HAVING RECESS CHANNEL STRUCTURE | SAMSUNG ELECTRONICS CO., LTD. | 2010-08-26 | — | — | US | claimed |
| US-7723755-B2 | Semiconductor having buried word line cell structure and method of fabricating the same | SAMSUNG ELECTRONICS CO., LTD. (KR) | 2010-05-25 | — | — | US | claimed |
| US-6653737-B2 | Interconnection structure and method for fabricating same | INTERNATIONAL BUSINESS MACHINES CORPORATION | 2003-11-25 | — | — | US | claimed |
| US-20030143792-A1 | Twin MONOS cell fabrication method and array organization | HALO LSI, INC. | 2003-07-31 | — | — | US | claimed |
| US-6531350-B2 | Twin MONOS cell fabrication method and array organization | HALO, INC. | 2003-03-11 | — | — | US | claimed |
| US-20020142581-A1 | Assembly including semiconductor chip, conductive pad, conductive trace, connection joint, and insulative adhesive; conductive trace includes routing line and pillar; connection joint contacts and electrically connects routing line and pad | INTERNATIONAL BUSINESS MACHINES CORPORATION | 2002-10-03 | — | — | US | claimed |
| US-20020137296-A1 | Twin monos cell fabrication method and array organization | HALO LSI DESIGN AND DEVICE TECHNOLOGY INC. | 2002-09-26 | — | — | US | claimed |
| EP-1237192-A2 | Twin monos memory cell and corresponding fabrication method | Halo Lsi Design and Device Technology Inc. (US) | 2002-09-04 | — | — | EP | claimed |
| US-6436814-B1 | Interconnection structure and method for fabricating same | INTERNATIONAL BUSINESS MACHINES CORPORATION | 2002-08-20 | — | — | US | claimed |
| US-6380082-B2 | Method of fabricating Cu interconnects with reduced Cu contamination | UNITED MICROELECTRONICS CORP. (TW) | 2002-04-30 | — | — | US | claimed |
| US-20010044202-A1 | METHOD OF PREVENTING COPPER POISONING IN THE FABRICATION OF METAL INTERCONNECTS | UNITED MICROELECTRONICS CORP. (TW) | 2001-11-22 | — | — | US | claimed |
| US-5979784-A | Method of forming local interconnection of a static random access memory | WINBOND ELECTRONICS CORP. (TW) | 1999-11-09 | — | — | US | claimed |