⚠ Novel chemotype — no close known analogue (best Tanimoto < 0.3). Unexplored chemical space relative to ChEMBL.
Similar compounds — the chemically nearest patent molecules
Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.
| Compound | similarity | top predicted | shared targets | |
|---|---|---|---|---|
| SCHEMBL28859033 | 0.89 | — | — | |
| SCHEMBL36654 | 0.89 | — | — | |
| SCHEMBL939115 | 0.89 | — | — | |
| SCHEMBL4531772 | 0.80 | — | — | |
| SCHEMBL4189741 | 0.80 | — | — | |
| SCHEMBL16335160 | 0.80 | — | — | |
| SCHEMBL1170274 | 0.80 | — | — | |
| SCHEMBL5092216 | 0.80 | — | — | |
| SCHEMBL5586427 | 0.80 | — | — | |
| SCHEMBL19876572 | 0.80 | — | — |
Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.
Patent provenance — the patents this molecule appears in, and who filed them
Claimed or disclosed in 7 patents. claimed = in the patent's claims; disclosed = body only.
| Patent | Title | Assignee | Published | Priority | Filing | Country | Status |
|---|---|---|---|---|---|---|---|
| US-12305281-B2 | Method for forming metal silicon oxide and metal silicon oxynitride layers | ASM IP HOLDING B.V. (NL) | 2025-05-20 | — | — | US | disclosed |
| US-20230349043-A1 | METHOD AND SYSTEM FOR FORMING METAL SILICON OXIDE AND METAL SILICON OXYNITRIDE LAYERS | ASM IP HOLDING B.V. (NL) | 2023-11-02 | — | — | US | disclosed |
| US-11725280-B2 | Method for forming metal silicon oxide and metal silicon oxynitride layers | ASM IP HOLDING B.V. (NL) | 2023-08-15 | — | — | US | disclosed |
| US-20220064795-A1 | METHOD AND SYSTEM FOR FORMING METAL SILICON OXIDE AND METAL SILICON OXYNITRIDE LAYERS | ASM IP HOLDING B.V. (NL) | 2022-03-03 | — | — | US | disclosed |
| CN-114121602-A | Method and system for forming metal silicon oxide and metal silicon oxynitride layers | ASM IP私人控股有限公司 | 2022-03-01 | — | — | CN | disclosed |
| US-7709359-B2 | Integrated circuit with dielectric layer | QIMONDA AG (DE) | 2010-05-04 | — | — | US | disclosed |
| US-20090057737-A1 | INTEGRATED CIRCUIT WITH DIELECTRIC LAYER | QIMONDA AG (DE) | 2009-03-05 | — | — | US | disclosed |