SCHEMBL517623

SCHEMBL517623

c1csc(C2NCCS2)c1

nearest known ligand 0.46

Predicted protein targets (top 18)

geneUniProtsupporting neighboursconfidence
MAPT P10636 6/20 0.46
TDP1 Q9NUW8 2/20 0.46
SMN1; SMN2 Q16637 2/20 0.46
ALDH1A1 P00352 4/20 0.42
MEN1 O00255 2/20 0.37
KMT2A Q03164 2/20 0.37
BRD4 O60885 2/20 0.36
KDM4E B2RXH2 3/20 0.35
HPGD P15428 2/20 0.35
ALOX15 P16050 1/20 0.35
ALOX12 P18054 1/20 0.35
NOS2 P35228 1/20 0.35
TSHR P16473 1/20 0.34
HTT P42858 1/20 0.34
HTR2A P28223 2/20 0.34
HTR2C P28335 2/20 0.34
POLB P06746 1/20 0.33
GAA P10253 1/20 0.33

Click a target to see other patent compounds predicted against it — the reverse direction, in place.

Similar compounds — the chemically nearest patent molecules

Nearest neighbours by Morgan-fingerprint cosine across the patent-compound collection, with each neighbour's top predicted target and the predicted targets it shares with this molecule.

Compoundsimilaritytop predictedshared targets
SCHEMBL2083948 0.74 MAPT (0.56) MAPTTDP1SMN1; SMN2ALDH1A1
SCHEMBL8648121 0.72 MAOA (0.46) MAPTSMN1; SMN2ALDH1A1MEN1KMT2A
SCHEMBL9693463 0.71 KDM4E (0.47) MAPTSMN1; SMN2ALDH1A1MEN1KMT2A
SCHEMBL4655299 0.69 MAPT (0.66) MAPTTDP1SMN1; SMN2ALDH1A1KDM4E
SCHEMBL22815188 0.68 ALDH1A1 (0.40) MAPTTDP1ALDH1A1MEN1KMT2A
SCHEMBL3657117 0.68
SCHEMBL19512122 0.67
SCHEMBL6179170 0.67 CHRM5 (0.46) SMN1; SMN2ALDH1A1MEN1KMT2APOLB
SCHEMBL166764 0.67 CHRM5 (0.46) SMN1; SMN2ALDH1A1MEN1KMT2APOLB
SCHEMBL4153725 0.67 MAPT (0.61) MAPTTDP1SMN1; SMN2ALDH1A1GAA

Similarity is cosine over the 2,048-bit Morgan fingerprint (≈ Tanimoto). Identical fingerprints score 1.00.

Patent provenance — the patents this molecule appears in, and who filed them

Claimed or disclosed in 19 patents. claimed = in the patent's claims; disclosed = body only.

PatentTitleAssigneePublishedPriorityFilingCountryStatus
US-12439528-B2 Method of preparing a high density interconnect printed circuit board including microvias filled with copper Atotech Deutschland GmbH & Co. KG (DE) 2025-10-07 US disclosed
CN-113924669-B Copper foil capable of preventing occurrence of wrinkles, electrode comprising the same, secondary battery comprising the same, and method for manufacturing the same SK纳力世有限公司 2025-04-29 CN disclosed
US-12245383-B2 Method of preparing a high density interconnect printed circuit board including microvias filled with copper Atotech Deutschland GmbH & Co. KG (DE) 2025-03-04 US disclosed
US-20240341042-A1 METHOD OF PREPARING A HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARD INCLUDING MICROVIAS FILLED WITH COPPER Atotech Deutschland GmbH & Co. KG (DE) 2024-10-10 US disclosed
US-12063751-B2 Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board Atotech Deutschland GmbH & Co. KG (DE) 2024-08-13 US disclosed
CN-110997983-B Crease-resistant copper foil, electrode comprising same, secondary battery comprising same, and method for manufacturing same SK纳力世有限公司 2022-10-21 CN disclosed
US-20220304164-A1 MANUFACTURING SEQUENCES FOR HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARDS AND A HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARD Atotech Deutschland GmbH & Co. KG (DE) 2022-09-22 US disclosed
US-20220279662-A1 METHOD OF PREPARING A HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARD INCLUDING MICROVIAS FILLED WITH COPPER Atotech Deutschland GmbH & Co. KG (DE) 2022-09-01 US disclosed
EP-4018791-A1 METHOD OF PREPARING A HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARD INCLUDING MICROVIAS FILLED WITH COPPER Atotech Deutschland GmbH & Co. KG (DE) 2022-06-29 EP disclosed
EP-4018790-A1 MANUFACTURING SEQUENCES FOR HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARDS AND A HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARD Atotech Deutschland GmbH & Co. KG (DE) 2022-06-29 EP disclosed
EP-2399281-B1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) ATOTECH DEUTSCHLAND GMBH (DE) 2016-04-20 EP disclosed
CN-102318041-B PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) ATOTECH DEUTSCHLAND GMBH 2014-05-07 CN disclosed
EP-2611950-B1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV), WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE ATOTECH DEUTSCHLAND GMBH (DE) 2013-11-13 EP disclosed
EP-2611950-A1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE Atotech Deutschland GmbH (DE) 2013-07-10 EP disclosed
CN-103038397-A Method for electrodepositing chip-to-chip, chip-to-wafer, and wafer-to-wafer copper interconnects in Through Silicon Vias (TSVs) by heating the substrate and cooling the electrolyte ATOTECH DEUTSCHLAND GMBH 2013-04-10 CN disclosed
US-20120024713-A1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE ATOTECH DEUTSCHLAND GMBH (DE) 2012-02-02 US disclosed
WO-2012014029-A1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) WITH HEATED SUBSTRATE AND COOLED ELECTROLYTE ATOTECH DEUTSCHLAND GMBH (DE) 2012-02-02 WO disclosed
CN-102318041-A PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) ATOTECH DEUTSCHLAND GMBH 2012-01-11 CN disclosed
US-20100206737-A1 PROCESS FOR ELECTRODEPOSITION OF COPPER CHIP TO CHIP, CHIP TO WAFER AND WAFER TO WAFER INTERCONNECTS IN THROUGH-SILICON VIAS (TSV) ATOTECH DEUTSCHLAND GMBH (DE) 2010-08-19 US disclosed